1. Field of the Invention
The present invention relates to a layout structure of a Sub-Word Line Driver (SWD) and a forming method thereof, and more particularly, to a layout structure of a SWD and a forming method thereof, which improve driving capabilities without expanding the area of a chip.
2. Description of the Related Art
The biggest market in the semiconductor industry is the Dynamic Random Access Memory (DRAM) market. The DRAM has been continuously developed as a main memory and advances have been made in terms of high density, low power, and low cost.
The cost competitiveness is rapidly leveling off and semiconductor producers are focusing more on increasing productivity per wafer. The number of chips produced per wafer can be increased when a cell size and a core area are reduced, thereby increasing the productivity. The core area exponentially increases with higher density and higher performance of a product. Thus, it is important to reduce the core area in a DRAM memory device.
There is a Sub-Word line Driver (SWD) area in the core area of a semiconductor device used to amplify a Word Line (WL) to a high supply voltage Vpp. As a reference, the SWD is a circuit switching on/off the word line during operations of reading/writing data of a cell. The SWD is located in the core of the semiconductor device. Thus, reduction and expansion of the SWD area is closely related to reduction and expansion of an entire chip area.